Why doesn't there exists a subi opcode for MIPS?

I am very new to **Assembly language**. I was reading about **MIPS** architecture and came to know that you have `addi` opcode but there is no `subi` opcode. Why don't we have a `subi` opcode?

Both `addi` and `addiu` take 16-bit signed immediates as operand, so it makes no sense to add separate `subi` and `subiu` opcodes.

When you create an instruction set, you're bound by some constraints, such as the total number of instructions you can create. The MIPS creators realized that there isn't a need for `subi` (because you can add a negative number with `addi` using 2's complement), and they simply made the decision to forego making that instruction. It may have been to conserve the number of instructions, or just simply because it isn't needed.